AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 746

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 41-9. Data IN Followed By Status OUT Transfer at the End of a Control Transfer
Figure 41-10. Data OUT Followed by Status IN Transfer
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USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
TX_COMPLT
(UDPHS_EPTSTAx)
AT91SAM9R64/RL64 Preliminary
Token IN
USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
TX_PK_RDY
(UDPHS_EPTSTAx)
Device Sends the Last
Data Payload to Host
Data IN
Note: A NAK handshake is always generated at the first status stage token.
Note: Before proceeding to the status stage, the software should determine that there is no risk
of extra data from the host (data stage). If not certain (non-predictable data stage length), then
the software should wait for a NAK-IN interrupt before proceeding to the status stage. This pre-
caution should be taken to avoid collision in the FIFO.
Token OUT
Set by Hardware
Host Sends the Last
Data Payload to the Device
Set by Hardware
ACK
Data OUT
Set by Firmware
Token OUT
Device Sends a
Status OUT to Host
Cleared by Firmware
Interrupt Pending
ACK
Data OUT (ZLP)
Token IN
Device Sends a Status IN
to the Host
Cleared by Firmware
Data IN
ACK
Token OUT
ACK
Set by Hardware
Clear by Hardware
Data OUT (ZLP)
Cleared by Firmware
6289C–ATARM–28-May-09
Interrupt
Pending
ACK