AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 754

IC MCU 32BIT AVR32 208-LQFP

AT32AP7001-ALUT

Manufacturer Part Number
AT32AP7001-ALUT
Description
IC MCU 32BIT AVR32 208-LQFP
Manufacturer
Atmel
Series
AVR®32 AP7r
Datasheets

Specifications of AT32AP7001-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, POR, PWM, WDT
Number Of I /o
90
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EBI, ISI, MCI, PS2, SPI, TWI, USB
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
90
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 1 Channel
Package
208PQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT32AP7001-ALUT
Manufacturer:
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Part Number:
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Manufacturer:
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35.6.3
Register Name: SR
Access Type: Read
Reset Value: 0x0
• SOF: Start of frame
0: No start of frame has been detected.
1: A start of frame has been detected.
• DIS: Image Sensor Interface disable
0: The image sensor interface is enabled.
1: The image sensor interface is disabled and stops capturing data. The DMA controller and the core can still read the
FIFOs.
• SOFTRST: Software reset
0: Software reset not asserted or not completed
1: Software reset has completed successfully
• CDC_STAT: Codec Request Status
0: Codec request has been asserted
1: Codec request has been serviced
• CRC_ERR: CRC synchronization error
0: No crc error in the embedded synchronization frame (SAV/EAV)
1: The CRC_SYNC is enabled in the control register and an error has been detected and not corrected. The frame is dis-
carded and the ISI waits for a new one.
• FO_C_OVF: FIFO codec overflow
0: No overflow
1: An overrun condition has occurred in input FIFO on the codec path. The overrun happens when the FIFO is full and an
attempt is made to write a new sample to the FIFO.
• FO_P_OVF: FIFO preview overflow
0: No overflow
32015G–AVR32–09/09
FO_P_EMP
31
23
15
7
ISI Status Register
FO_P_OVF
30
22
14
6
FO_C_OVF
29
21
13
5
CRC_ERR
28
20
12
4
CDC_STAT
27
19
11
3
SOFTRST
26
18
10
2
FR_OVR
DIS
AT32AP7001
25
17
9
1
FO_C_EMP
SOF
24
16
8
0
754

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