AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 476

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

sample_clk
27.3
Figure 27-1. Functional Block Diagram
27.4
Table 27-1.
27.5
27.5.1
27.5.2
32015G–AVR32–09/09
din1[15:0]
din2[15:0]
Pin Name
DATA0
DATA1
DATAN0
DATAN1
Block Diagram
Pin Name List
Product Dependencies
clk
I/O Lines
Power Management
I/O Lines Description
The output pins used for the output bitstream from the Audio Bitstream DAC may be multiplexed
with PIO lines.
Before using the Audio Bitstream DAC, the PIO controller must be configured in order for the
Audio Bitstream DAC I/O lines to be in Audio Bitstream DAC peripheral mode.
The PB-bus clock to the Audio Bitstream DAC is generated by the power manager. Before using
the Audio Bitstream DAC, the programmer must ensure that the Audio Bitstream DAC clock is
enabled in the power manager.
Clock Generator
Equalization FIR
Equalization FIR
Pin Description
Output from Audio Bitstream DAC Channel 0
Output from Audio Bitstream DAC Channel 1
Inverted output from Audio Bitstream DAC Channel 0
Inverted output from Audio Bitstream DAC Channel 1
Audio Bitstream DAC
(INT=128)
(INT=128)
COMB
COMB
Sigma-Delta
Sigma-Delta
DA-MOD
DA-MOD
AT32AP7001
Output
Output
Output
Output
Type
bit_clk
bit_out1
bit_out2
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