MT48H8M16LFB4-10 Micron Technology Inc, MT48H8M16LFB4-10 Datasheet - Page 35

• Manufacturer Part Number: MT48H8M16LFB4-10
• Description: IC SDRAM 128MBIT 100MHZ 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H8M16LFB4-10

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 8:
PDF: 09005aef80c97087/Source: 09005aef80c97015
MT48H8M16_2.fm - Rev. E 3/05 EN
Current State
Write (Auto
Row Active
Read (Auto
Precharge
Precharge
Disabled)
Disabled)
Any
Idle
Truth Table 3 – Current State BanK n, Command to Bank n
Notes: 1-6; notes appear below table.
CS#
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Notes: 1. This table applies when CKE
RAS#
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
2. This table is bank-specific, except where noted; i.e., the current state is for a specific bank
3. Current state definitions:
4. The following states must not be interrupted by a command issued to the same bank.
5. The following states must not be interrupted by any executable command; COMMAND
t
and the commands shown are those allowed to be issued to that bank when in that state.
Exceptions are covered in the notes below.
Idle:
Row Active: A row in the bank has been activated, and τRCD has been met. No data
Read:
Write:
COMMAND INHIBIT or NOP commands, or allowable commands to the other bank should
be issued on any clock edge occurring during these states. Allowable commands to the
other bank are determined by its current state and Truth Table 3, and according to Truth
Table 4.
Precharging: Starts with registration of a PRECHARGE command and ends when
Row Activating: Starts with registration of an ACTIVE command and ends when
Read w/Auto Precharge Enabled: Starts with registration of a READ command with auto
Write w/Auto Precharge Enabled: Starts with registration of a WRITE command with auto
INHIBIT or NOP commands must be applied on each positive clock edge during these
states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
Accessing Mode Register: Starts with registration of a LOAD MODE REGISTER command
XSR has been met (if the previous state was self refresh).
CAS#
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
WE#
The bank has been precharged, and
bursts/accesses and no register accesses are in progress.
A READ burst has been initiated, with auto precharge disabled, and has not
yet terminated or been terminated.
A WRITE burst has been initiated, with auto precharge disabled, and has not
yet terminated or been terminated.
Once
met. Once
precharge enabled and ends when
bank will be in the idle state.
precharge enabled and ends when
bank will be in the idle state.
met. Once
and ends when
the all banks idle state.
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
t
Command (Action)
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
ACTIVE (Select and activate row)
AUTO REFRESH
LOAD MODE REGISTER
PRECHARGE
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE (Deactivate row in bank or banks)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE (Truncate READ burst, start PRECHARGE)
BURST TERMINATE
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE (Truncate WRITE burst, start PRECHARGE)
BURST TERMINATE
RP is met, the bank will be in the idle state.
t
t
RCD is met, the bank will be in the row active state.
RC is met, the SDRAM will be in the all banks idle state.
35
n-1
t
MRD has been met. Once
was HIGH and CKE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
RP has been met. Once
RP has been met. Once
t
n
RP has been met.
is HIGH (see Truth Table 2) and after
128Mb: x16 Mobile SDRAM
t
MRD is met, the SDRAM will be in
©2003 Micron Technology, Inc. All rights reserved.
Power-Down
t
t
RP is met, the
RP is met, the
t
t
RP is met.
RCD is
Notes
11
10
10
10
10
10
10
t
7
7
8
8
9
8
9
RC is