DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 65

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

Table 11-1. E1 Sync/Resync Criteria
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive Carrier Loss (RCL) Alternate Criteria (RCLA). Defines the criteria for a Receive Carrier Loss condition
for both the framer and Line Interface (LIU)
Bit 1/Unused, must be set to zero for proper operation.
Bit 2/Unused, must be set to zero for proper operation.
Bit 3/Sa4-Bit Select (Sa4S). Set to one to have RLCLK pulse at the Sa4-bit position; set to zero to force RLCLK low during
Sa4-bit position. See the Functional Timing Diagrams section for details.
Bit 4/Sa5-Bit Select (Sa5S). Set to one to have RLCLK pulse at the Sa5-bit position; set to zero to force RLCLK low during
Sa5-bit position. See the Functional Timing Diagrams section for details.
Bit 5/Sa6-Bit Select (Sa6S). Set to one to have RLCLK pulse at the Sa6-bit position; set to zero to force RLCLK low during
Sa6-bit position. See the Functional Timing Diagrams section for details.
Bit 6/Sa7-Bit Select (Sa7S). Set to one to have RLCLK pulse at the Sa7-bit position; set to zero to force RLCLK low during
Sa7-bit position. See the Functional Timing Diagrams section for details.
Bit 7/Sa8-Bit Select (Sa8S). Set to one to have RLCLK pulse at the Sa8-bit position; set to zero to force RLCLK low during
Sa8-bit position. See the Functional Timing Diagrams section for details.
MULTIFRAME
FRAME OR
LEVEL
CRC-4
CAS
FAS
0 = RCL declared upon 255 consecutive zeros (125µs)
1 = RCL declared upon 2048 consecutive zeros (1ms)
Sa8S
7
0
FAS present in frame N
and N + 2, and FAS not
present in frame N + 1
Two valid MF alignment
words found within 8ms
Valid MF alignment word
found and previous time
slot 16 contains code other
than all zeros
Sa7S
E1RCR2
E1 Receive Control Register 2
34h
6
0
SYNC CRITERIA
Sa6S
5
0
Sa5S
4
0
65 of 269
Three consecutive incorrect FAS
received
Alternate: (E1RCR1.2 = 1) The
above criteria is met or three
consecutive incorrect bit 2 of non-
FAS received.
915 or more CRC-4 codewords out
of 1000 received in error
Two consecutive MF alignment
words received in error
Sa4S
3
0
RESYNC CRITERIA
DS21455/DS21458 Quad T1/E1/J1 Transceivers
—
2
0
—
1
0
RCLA
0
0
4.2 and 4.3.2
ITU SPEC.
G.732 5.2
G.706
G.706
4.1.1
4.1.2