DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 23

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

Signal Name:
Signal Description:
Signal Type:
An extracted pulse, one RCLK wide, is output at this pin which identifies either frame (IOCR1.5 = 0) or multiframe
(IOCR1.5 = 1) boundaries. If set to output-frame boundaries then via IOCR1.6, RSYNC can also be set to output double-wide
pulses on signaling frames in T1 mode. If the receive-side elastic store is enabled, then this pin can be enabled to be an input
via IOCR1.4 at which a frame or multiframe boundary pulse is applied.
Signal Name:
Signal Description:
Signal Type:
An extracted 8kHz pulse, one RCLK wide, is output at this pin, which identifies frame boundaries.
Signal Name:
Signal Description:
Signal Type:
An extracted pulse, one RCLK wide (elastic store disabled) or one RSYSCLK wide (elastic store enabled), is output at this pin,
which identifies multiframe boundaries.
Signal Name:
Signal Description:
Signal Type:
Updated on the rising edge of RCLK with the data out of the receive-side framer.
Signal Name:
Signal Description:
Signal Type:
1.544MHz, 2.048MHz, 4.096MHz, or 8.192MHz clock. Only used when the receive-side elastic-store function is enabled.
Should be tied low in applications that do not use the receive-side elastic store. See the Interleaved PCM Bus Operation
section for details on 4.096MHz and 8.192MHz operation using the IBO.
Signal Name:
Signal Description:
Signal Type:
Outputs signaling bits in a PCM format. Updated on rising edges of RCLK when the receive-side elastic store is disabled.
Updated on the rising edges of RSYSCLK when the receive-side elastic store is enabled.
Signal Name:
Signal Description:
Signal Type:
A dual-function output that is controlled by the CCR1.0 control bit. This pin can be programmed to either toggle high when the
synchronizer is searching for the frame and multiframe or to toggle high if the TCLK pin has not been toggled for 5s.
Signal Name:
Signal Description:
Signal Type:
Set high when the signaling data is frozen via either automatic or manual intervention. Used to alert downstream equipment of
the condition.
RSYNC
Receive Sync
Input/Output
RFSYNC
Receive Frame Sync
Output
RMSYNC
Receive Multiframe Sync
Output
RDATA
Receive Data
Output
RSYSCLK
Receive System Clock
Input
RSIG
Receive Signaling Output
Output
RLOS/LOTC
Receive Loss of Sync/Loss of Transmit Clock
Output
RSIGF
Receive Signaling Freeze
Output
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DS21455/DS21458 Quad T1/E1/J1 Transceivers