DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 164

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

25.7 LIU Control Registers
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit Power-Down (TPD). This bit along with the LIUC/TPD pin and the LTS (LBCR.7) bit controls the transmit
power-down function.
Table 25-1. TPD Control
Bit 1/Disable Jitter Attenuator (DJA).
Bit 2/Jitter Attenuator Buffer Depth Select (JABDS).
Bit 3/Jitter Attenuator Select (JAS).
Bit 4/Receive Equalizer Gain Limit (EGL). This bit controls the sensitivity of the receive equalizer.
Bits 5 to 7/Line Build-Out Select (L0 to L2). These bits select the output waveshape. See
25-4, and
the user needs only to select 000 for 75Ω operation or 001 for 120Ω operation. Using TT0 and TT1 of the LICR4 register,
users can then select the proper internal source termination. Line build-outs 100 and 101 are provided for backward
compatibility with older products only.
LBCR.7
(LTS)
0
0
1
1
1
1
0 = powers down the transmitter and tri-states the TTIP and TRING pins
1 = normal transmitter operation
0 = jitter attenuator enabled
1 = jitter attenuator disabled
0 = 128 bits
1 = 32 bits (use for delay sensitive applications)
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
T1 Mode: 0 = -36dB (long haul)
E1 Mode: 0 = -12dB (short haul)
Table 25-5
LIUC/TPD
L2
7
0
PIN
X
X
0
0
1
1
1 = -15dB (limited long haul)
1 = -43dB (long haul)
for the correct register settings for specific applications. In E1 mode, when using the internal termination,
L1
LIC1
Line Interface Control 1
78h
6
0
LIC1.0
(TPD)
0
1
0
1
0
1
L0
5
0
Transmitter in power-down mode, TTIP and TRING tri-stated
Transmitter enabled
Transmitter in power-down mode, TTIP and TRING tri-stated
Transmitter enabled
Transmitter in power-down mode, TTIP and TRING tri-stated
Transmitter in power-down mode, TTIP and TRING tri-stated
EGL
4
0
164 of 269
JAS
3
0
FUNCTION
DS21455/DS21458 Quad T1/E1/J1 Transceivers
JABDS
2
0
DJA
1
0
Table
25-2,
TPD
0
0
Table
25-3,
Table