DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 26

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

Signal Name:
Signal Description:
Signal Type:
Must be low to read or write to the device. CS is an active-low signal.
Signal Name:
Signal Description:
Signal Type:
In nonmultiplexed bus operation (MUX = 0), it serves as the upper address bit. In multiplexed bus operation (MUX = 1), it
serves to demultiplex the bus on a positive-going edge.
Signal Name:
Signal Description:
Signal Type:
WR is an active-low signal.
5.4 Extended System Information Bus
Signal Name:
Signal Description:
Signal Type:
Used to group two DS21455/DS21458s into a bus-sharing mode for alarm and status reporting. See the Extended System
Information Bus (ESIB) section for more details.
Signal Name:
Signal Description:
Signal Type:
Used to group two DS21455/DS21458s into a bus-sharing mode for alarm and status reporting. See the Extended System
Information Bus (ESIB) section for more details.
Signal Name:
Signal Description:
Signal Type:
Used to group two DS21455/DS21458s into a bus-sharing mode for alarm and status reporting. See the Extended System
Information Bus (ESIB) section for more details.
5.5 JTAG Test Access Port Pins
Signal Name:
Signal Description:
Signal Type:
JTRST is used to asynchronously reset the test access port controller. After power-up, JTRST must be toggled from low to
high. This action will set the device into the JTAG DEVICE ID mode. Normal device operation is restored by pulling JTRST
low. JTRST is pulled HIGH internally via a 10k resistor operation.
Signal Name:
Signal Description:
Signal Type:
This pin is sampled on the rising edge of JTCLK and is used to place the test-access port into the various defined IEEE 1149.1
states. This pin has a 10k pullup resistor.
CS (DS21458 Only)
Chip Select
Input
ALE (AS)/A7
Address Latch Enable (Address Strobe) or A7
Input
WR (R/W)
Write Input (Read/Write)
Input
ESIBS0
Extended System Information Bus Select 0
Input/Output
ESIBS1
Extended System Information Bus Select 1
Input/Output
ESIBRD
Extended System Information Bus Read
Input/Output
JTRST
IEEE 1149.1 Test Reset
Input
JTMS
IEEE 1149.1 Test Mode Select
Input
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DS21455/DS21458 Quad T1/E1/J1 Transceivers