DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 154

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

24.3.5 HDLC FIFOS
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit HDLC Data Bit 0 (THD0). LSB of a HDLC packet data byte.
Bit 1/Transmit HDLC Data Bit 1 (THD1).
Bit 2/Transmit HDLC Data Bit 2 (THD2).
Bit 3/Transmit HDLC Data Bit 3 (THD3).
Bit 4/Transmit HDLC Data Bit 4 (THD4).
Bit 5/Transmit HDLC Data Bit 5 (THD5).
Bit 6/Transmit HDLC Data Bit 6 (THD6).
Bit 7/Transmit HDLC Data Bit 7 (THD7). MSB of a HDLC packet data byte.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive HDLC Data Bit 0 (RHD0). LSB of a HDLC packet data byte.
Bit 1/Receive HDLC Data Bit 1 (RHD1).
Bit 2/Receive HDLC Data Bit 2 (RHD2).
Bit 3/Receive HDLC Data Bit 3 (RHD3).
Bit 4/Receive HDLC Data Bit 4 (RHD4).
Bit 5/Receive HDLC Data Bit 5 (RHD5).
Bit 6/Receive HDLC Data Bit 6 (RHD6).
Bit 7/Receive HDLC Data Bit 7 (RHD7). MSB of a HDLC packet data byte.
RHD7
THD7
7
0
7
0
THD6
RHD6
H1TF, H2TF
HDLC # 1 Transmit FIFO, HDLC # 2 Transmit FIFO
9Dh, Adh
H1RF, H2RF
HDLC # 1 Receive FIFO, HDLC # 2 Receive FIFO
9Eh, Aeh
6
0
6
0
THD5
RHD5
5
0
5
0
THD4
RHD4
4
0
4
0
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THD3
RHD3
3
0
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
RHD2
THD2
2
0
2
0
RHD1
THD1
1
0
1
0
RHD0
THD0
0
0
0
0