DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 62

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

10.5 T1 Information Register
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Frame Bit Error Event (FBE). Set when a Ft (D4) or FPS (ESF) framing bit is received in error.
Bit 1/B8ZS Codeword Detect Event (B8ZS). Set when a B8ZS codeword is detected at RPOS and RNEG independent of
whether the B8ZS mode is selected or not via T1TCR2.7. Useful for automatically setting the line coding.
Bit 2/Severely Errored Framing Event (SEFE). Set when two out of six framing bits (Ft or FPS) are received in error.
Bit 3/Sixteen Zero Detect Event (16ZD). Set when a string of at least 16 consecutive zeros (regardless of the length of the
string) have been received at RPOSI and RNEGI.
Bit 4/Eight Zero Detect Event (8ZD). Set when a string of at least eight consecutive zeros (regardless of the length of the
string) have been received at RPOSI and RNEGI.
Bit 5/Change of Frame Alignment Event (COFA). Set when the last resync resulted in a change of frame or multiframe
alignment.
Bit 6/Transmit Pulse Density Violation Event (TPDV). Set when the transmit data stream does not meet the ANSI T1.403
requirements for pulse density.
Bit 7/Receive Pulse Density Violation Event (RPDV). Set when the receive data stream does not meet the ANSI T1.403
requirements for pulse density.
RPDV
7
0
TPDV
INFO1
Information Register 1
10h
6
0
COFA
5
0
8ZD
4
0
62 of 269
16ZD
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
SEFE
2
0
B8ZS
1
0
FBE
0
0