DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 110

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 5/Channel Pointer Address Bits (IAA0 to IAA5). IAA0 is the LSB of the 5-bit Channel Code.
Bit 6/Global Transmit Idle Code (GTIC). Setting this bit will cause all transmit idle codes to be set to the value written to
the PCICR register. When using this bit, the user must place any transmit address in the IAA0 through IAA5 bits (00h–1Fh).
This bit must be set = 0 for read operations.
Bit 7/Global Receive Idle Code (GRIC). Setting this bit will cause all receive idle codes to be set to the value written to the
PCICR register. When using this bit, the user must place any receive address in the IAA0 through IAA5 bits (20h–3Fh). This
bit must be set = 0 for read operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Per-Channel Idle Code Bits (C0 to C7). C0 is the LSB of the code (this bit is transmitted last).
The TCICE1/2/3/4 are used to determine which of the 24 T1 or 32 E1 channels from the backplane to the
T1 or E1 line should be overwritten with the code placed in the per-channel code array
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Transmit Channels 1 to 8 Code Insertion Control Bits (CH1 to CH8).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Transmit Channels 9 to 16 Code Insertion Control Bits (CH9 to CH16).
0 = do not insert data from the idle code array into the transmit data stream
1 = insert data from the idle code array into the transmit data stream
0 = do not insert data from the idle code array into the transmit data stream
1 = insert data from the idle code array into the transmit data stream
GRIC
CH16
CH8
C7
7
0
7
0
7
0
7
0
CH15
GTIC
CH7
C6
IAAR
Idle Array Address Register
7Eh
PCICR
Per-Channel Idle Code Register
7Fh
TCICE1
Transmit Channel Idle Code Enable Register 1
80h
TCICE2
Transmit Channel Idle Code Enable Register 2
81h
6
0
6
0
6
0
6
0
CH14
IAA5
CH6
C5
5
0
5
0
5
0
5
0
CH13
IAA4
CH5
C4
4
0
4
0
4
0
4
0
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CH12
IAA3
CH4
C3
3
0
3
0
3
0
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
CH11
CH3
IAA2
C2
2
0
2
0
2
0
2
0
CH10
CH2
IAA1
C1
1
0
1
0
1
0
1
0
IAA0
CH1
CH9
C0
0
0
0
0
0
0
0
0
.