DS21458-W+ Maxim Integrated, DS21458-W+ Datasheet - Page 56

• Manufacturer Part Number: DS21458-W+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS21458-W+

• Product: Framer
• Number Of Transceivers: 4
• Data Rate: 64 Kbps
• Supply Current (max): 328 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: CSBGA
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 3.3 V
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: 90-21458+W00

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit Side Bit 7 Zero Suppression Enable (TB7ZS).
Bit 1/Transmit Side ZBTSI Support Enable (TZBTSI). Allows ZBTSI information to be input on TLINK pin.
Bit 2/Transmit Side D4 Yellow Alarm Select (TD4YM).
Bit 3/F-Bit Corruption Type 1. (FBCT1). A low-to-high transition of this bit causes the next three consecutive Ft (D4
framing mode) or FPS (ESF framing mode) bits to be corrupted, causing the remote end to experience a loss of
synchronization.
Bit 4/F-Bit Corruption Type 2. (FBCT2). Setting this bit high enables the corruption of one Ft (D4 framing mode) or FPS
(ESF framing mode) bit in every 128 Ft or FPS bits as long as the bit remains set.
Bit 5/Transmit FDL Zero Stuffer Enable (TZSE). Set this bit to zero if using the internal HDLC controller instead of the
legacy support for the FDL. See I/O Pin Configuration Options for details.
Bit 6/Transmit SLC–96/Fs-Bit Insertion Enable (TSLC96). Only set this bit to a one in D4 framing and SLC-96
applications. Must be set to one to source the Fs pattern from the TFDL register. See D4/SLC–96 Operation for details.
Bit 7/Transmit B8ZS Enable (TB8ZS).
0 = no stuffing occurs
1 = Bit 7 force to a one in channels with all zeros
0 = ZBTSI disabled
1 = ZBTSI enabled
0 = zeros in bit 2 of all channels
1 = a one in the S-bit position of frame 12
0 = zero stuffer disabled
1 = zero stuffer enabled
0 = SLC–96/Fs-bit insertion disabled
1 = SLC–96/Fs-bit insertion enabled
0 = B8ZS disabled
1 = B8ZS enabled
TB8ZS
7
0
TSLC96
T1TCR2
T1 Transmit Control Register 2
06h
6
0
TZSE
5
0
FBCT2
4
0
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FBCT1
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
TD4YM
2
0
TZBTSI
1
0
TB7ZS
0
0