ORT82G5-1BM680C LATTICE [Lattice Semiconductor], ORT82G5-1BM680C Datasheet - Page 66

• Manufacturer Part Number: ORT82G5-1BM680C
• Description: 0.6 to 3.7 Gbps XAUI and FC FPSCs
• Manufacturer: LATTICE [Lattice Semiconductor]

Lattice Semiconductor
Table 28. ORT42G5 Memory Map (Continued)
Common Control Registers (Read/Write)
30A00
30A01
30A02
Common Status Registers
30A03
* Useful values for RX_FIFO_MIN [0:4] are 0 to 17(decimal)
Absolute
Address
(0x)
[0:1] TCKSELA
[2:3] RCKSELA
[4:5] TCKSELB
[6:7] RCKSELB
[0:4]
[5:7] RX_FIFO_MIN
[0:1] RX_FIFO_MIN
[3:7]
[2:7]
Bit
[2]
[0]
[1]
FMPU_RESYNC4
SYNC4_OVFL
SYNC4_OOS
Name
—
—
—
Reset
Value
(0x)
00
00
00
00
Transmit Clock Select. Controls source of 78 MHz TCK78 for SERDES
quad A
01 = Channel AC
11 = Channel AD
Receive Clock Select. Controls source of 78 MHz RCK78 for SERDES
quad A
01 = Channel AC
11 = Channel AD
Transmit Clock Select. Controls source of 78 MHz TCK78 for SERDES
quad B
01 = Channel BC
11 = Channel BD
Receive Clock Select. Controls source of 78 MHz RCK78 for SERDES
quad B
01 = Channel BC
11 = Channel BD
Reserved for future use
LSb’s for the threshold for low address in RX_FIFOs. RX_FIFO_MIN, Bit
5 is LSb.*
MSb’s for the threshold for low address in RX_FIFOs. RX_FIFO_MIN, Bit
1 is MSb.*
Resynchronize a four-channel group. When FPMPU_RESYNC4 transi-
tions from 0 to 1, the entire four-channel group is resynchronized.
FMPU_RESYNC4 = 0 on device reset
Reserved for future use
Read-Only Multi-Channel Overflow Status. When SYNC4_OVFL=1, 4-
channel synchronization FIFO overflow has occurred. SYNC4_OVFL=0
on device reset.
Read-Only Multi-Channel Out-Of-Sync Status. When SYNC4_OOS=1,
4-channel synchronization has failed. SYNC4_OOS=0 on device reset.
Reserved for future use.
66
ORCA ORT42G5 and ORT82G5 Data Sheet
Description