XC3S100E-4CP132GI XILINX [Xilinx, Inc], XC3S100E-4CP132GI Datasheet - Page 228

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XC3S100E-4CP132GI

Manufacturer Part Number
XC3S100E-4CP132GI
Description
Spartan-3E FPGA Family: Complete Data Sheet
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
Pinout Descriptions
Table 153: FG484 Package Pinout (Continued)
User I/Os by Bank
Table 154
distributed between the four I/O banks on the FG484 pack-
age.
Table 154: User I/Os Per Bank for the XC3S1600E in the FG484 Package
Footprint Migration Differences
The XC3S1600E FPGA is the only Spartan-3E device
offered in the FG484 package.
228
Notes:
1.
Top
Right
Bottom
Left
TOTAL
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
Bank
Package
The eight global clock pins in this bank have optional functionality during configuration and are counted in the DUAL column.
Edge
indicates how the 304 available user-I/O pins are
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
I/O Bank
XC3S1600E
Pin Name
0
1
2
3
Maximum
376
I/O
94
94
94
94
FG484
Ball
K11
K13
J10
L10
L11
L12
L14
M9
K9
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
Type
214
I/O
56
50
45
63
www.xilinx.com
Table 153: FG484 Package Pinout (Continued)
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
INPUT
Bank
22
16
18
16
72
All Possible I/O Pins by Type
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
DUAL
XC3S1600E
Pin Name
21
24
46
1
0
DS312-4 (v3.4) November 9, 2006
VREF
28
7
7
7
7
Product Specification
FG484
M11
M12
M13
Ball
N10
N12
N14
P13
CLK
0
0
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
16
8
8
(1)
(1)
Type
R

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