AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 62

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6™-2E Processor Data Sheet
SYSCALL/SYSRET
Target Address
Register (STAR)
Figure 35. SYSCALL/SYSRET Target Address Register (STAR)
Write Handling
Control Register
(WHCR)
Figure 36. Write Handling Control Register (WHCR)
44
63
Symbol
Note: Hardware RESET initializes this MSR to all zeros.
63
WAELIM
WAE15M
Reserved
SYSRET CS Selector and SS
Selector Base
Description
Write Allocate Enable Limit
Write Allocate Enable 15-to-16-Mbyte 16
48
The SYSCALL/SYSRET target address register (STAR)
contains the target EIP address used by the SYSCALL
instruction and the 16-bit code and stack segment selector
bases used by the SYSCALL and SYSRET instructions. Figure
35 shows the format of the STAR register, and Table 7 defines
the function of each bit of the STAR register. For more
information, see the SYSCALL and SYSRET Instruction
Specification Application Note, order #21086.
Table 7. SYSCALL/SYSRET Target Address Register (STAR) Definition
The write handling control register (WHCR) is an MSR that
contains two fields—the write allocate enable limit (WAELIM)
field, and the write allocate enable 15-to-16-Mbyte (WAE15M)
bit. Figure 36 shows the format of the WHCR register. See
“Write Allocate” on page 192 for more information.
47
63–48
47–32
31–0
SYSCALL CS Selector and SS
Bit
Selector Base
Description
SYSRET CS and SS Selector Base
SYSCALL CS and SS Selector Base
Target EIP Address
Preliminary Information
Bits
31-22
Software Environment
32
31
32
31
WAELIM
22
21
Target EIP Address
17
16
W
M
A
E
1
5
15
R/W
R/W
R/W
R/W
22529B/0—January 2000
Chapter 3
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