AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 107
AMD-K6-2E/400AFR
Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-K6-2E400AFR.pdf
(332 pages)
- Current page: 107 of 332
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22529B/0—January 2000
5.6
Pin Attribute
Pin Location
Summary
Sampled
Chapter 5
AHOLD (Address Hold)
Input
V-04
AHOLD can be asserted by the system to initiate one or more
inquire cycles. To allow the system to drive the address bus
during an inquire cycle, the processor floats A[31:3] and AP off
the clock edge on which AHOLD is sampled asserted. The data
bus and all other control and status signals remain under the
control of the processor and are not floated. This allows a bus
cycle that is in progress when AHOLD is sampled asserted to
continue to completion. The processor resumes driving the
address bus off the clock edge on which AHOLD is sampled
negated.
If AHOLD is sampled asserted, ADS# is only asserted in order
to perform a writeback cycle due to an inquire cycle that hits a
modified cache line.
The processor samples AHOLD on every clock edge. AHOLD is
recognized while INIT and RESET are sampled asserted.
Signal Descriptions
AMD-K6™-2E Processor Data Sheet
89
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