zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 88

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zl50404

Manufacturer Part Number
zl50404
Description
Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
13.3.6.35
I²C Address h0AE, CPU Address: 5A0
Accessed by CPU and I²C (R/W)
13.3.6.36
I²C Address h0AF, CPU Address: 5A1
Accessed by CPU and I²C (R/W)
13.3.6.37
I²C Address h0B0, CPU Address: 5A2
Accessed by CPU and I²C (R/W)
13.3.6.38
I²C Address h0B1, CPU Address: 5A3
Accessed by CPU and I²C (R/W)
13.3.6.39
I²C Address h0B2, CPU Address: 5A4
Accessed by CPU and I²C (R/W)
RLOW and RHIGH form a range for logical ports to be classified with priority specified in RPRIORITY.
Bits[7:0]:
Bits[7:0]:
Bits[7:0]:
Bits[7:0]:
Bits[0]:
Bit [3:1]
Bit [5:4]
Bit [7:6]
RLOWL – User Define Range Low Bit 7:0
RLOWH – User Define Range Low Bit 15:8
RHIGHL – User Define Range High Bit 7:0
RHIGHH – User Define Range High Bit 15:8
RPRIORITY – User Define Range Priority
Lower 8 bit of the User Define Logical Port Low Range
Upper 8 bit of the User Define Logical Port Low Range
Lower 8 bit of the User Define Logical Port High Range
Upper 8 bit of the User Define Logical Port High Range
Drop Priority (inclusive only)
Transmit Priority (inclusive only)
Reserved
00 - No Filtering
01 - Exclusive Filtering (x<=RLOW or x>=RHIGH)
10 - Inclusive Filtering (RLOW<x<RHIGH)
11 - Invalid
Zarlink Semiconductor Inc.
ZL50404
88
Data Sheet

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