zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 76

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zl50404

Manufacturer Part Number
zl50404
Description
Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
CPU Queue insertion command
13.3.4.18
CPU Address:h33A-33E
Accessed by CPU, (R/W)
CPU Queue insertion command
13.3.4.19
CPU Address:h33f
Accessed by CPU, (R/W)
CPU receive queue status
13.3.5
13.3.5.1
I²C Address h049; CPU Address:h400
Accessed by CPU and I²C (R/W)
Used in conjuction with AGETIME_HIGH. The ZL50404 removes the MAC address from the data base and sends a
Delete MAC Address Control Command to the CPU.
CR4
Bit [14:0]:
Bit [15]:
Bit [14:0]:
Bit [30:15]
Bit [38:32]
Bit [0]:
Bit [1]:
Bit [2]:
(Group 4 Address) Search Engine Group
AGETIME_LOW – MAC address aging time Low
CPURLSINFO0 - CPURLSINFO4 – Receive Queue Status
CPUGRNCTR – CPU Granule Control
Bit [7:0]:
CR3
Allocate granule to the CPU if set to one. Otherwise, do not allocate any resource.
Read allocated granule (at rising edge only)
Release info valid (will be processed at rising edge only)
Header pointer
Tail pointer
Number of granules for the release
Granule pointer.
Pointer valid
Low byte of the MAC address aging timer (Default 0x5C)
CR2
CR1
Zarlink Semiconductor Inc.
CR0
ZL50404
76
0
Data Sheet

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