zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 62

• Manufacturer Part Number: zl50404
• Description: Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.3
13.3.1
13.3.1.1
I²C Address 000+n; CPU Address:0000+2n (n = port number)
Accessed by CPU and I²C (R/W)
Indirectly Accessed Registers
(Group 0 Address) MAC Ports Group
ECR1Pn: Port n Control Register
Bit [0]
Bit [1]
Bit [2]
Bit [4:3]
Bit [5]
Bit [7:6]
1 - Flow Control Off
0 - Flow Control On (Default)
When Flow Control On:
•
•
When Flow Control Off:
•
•
1 - Half Duplex - Only in 10/100 mode
0 - Full Duplex (Default)
1 - 10 Mbps
0 - 100 Mbps (Default)
00 - Enable Auto-Negotiation
01 - Limited Disable Auto-Negotiation
10 - Force Link Down
11 - Force Link Up
Asymmetric Flow Control Enable.
0 – Disable asymmetric flow control (Default)
1 – Enable Asymmetric flow control
When this bit is set and flow control is on (bit [0] = 0), the device does not send out
flow control frames, but it’s receiver interprets and processes flow control frames.
SS - Spanning tree state (IEEE 802.1D spanning tree protocol)
00 - Blocking:
01 - Listening:
10 - Learning:
11 - Forwarding:
In half duplex mode, the MAC transmitter applies back pressure for flow
control.
In full duplex mode, the MAC transmitter sends Flow Control frames when
necessary. The MAC receiver interprets and processes incoming flow
control frames. The Flow Control Frame Received counter is incremented
whenever a flow control is received.
In half duplex mode, the MAC transmitter does not assert flow control by
sending flow control frame or jamming collision.
In full duplex mode, the MAC transmitter does not send flow control frames.
The MAC receiver does not interpret or process the flow control frames. The
Flow Control Frame Received counter is not incremented.
This enables hardware state machine for auto-negotiation. (Default)
This disables hardware state machine for speed auto-negotiation (use
Disable the port. Hardware does not talk to PHY.
The configuration in ECR1Pn[2:0] is used for (speed/duplex/flow control)
setup. Hardware does not talk to PHY.
ECR1Pn[2:0] for configuration). Hardware will still poll PHY for link status.
Frame is dropped
Frame is dropped
Frame is dropped. Source MAC address is learned.
Frame is forwarded. Source MAC address is learned. (Default)
Zarlink Semiconductor Inc.
ZL50404
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Data Sheet