zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 71

• Manufacturer Part Number: zl50404
• Description: Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.3.3.6
CPU Address:h228+2n (n = hash value)
Accessed by CPU (R/W)
13.3.3.7
CPU Address:h229+2n (n = hash value)
Accessed by CPU (R/W)
13.3.4
MAC5 to MAC0 registers form the CPU MAC address. When a packet with destination MAC address match MAC
[5:0], the packet is forwarded to the CPU.
13.3.4.1
CPU Address:h300
Accessed by CPU (R/W)
(Group 3 Address) CPU Port Configuration Group
MULTICAST_HASHn-0 – Multicast hash result 0~7 mask byte 0
MULTICAST_HASHn-1 – Multicast hash result 0~7 mask byte 1
MAC0 – CPU MAC address byte 0
Bit [3:0]:
Bit[7:4]:
Bit [1:0]:
Bit [5:2]:
Bit [7:6]:
Bit [7:0]:
5
MAC5
MAC4
Port 9-8 bit map for multicast hash. (Default 0x3)
Reserved (Default 0xF)
MULTICAST_HASH0-1
Hash Select. The hash algorithm selected is valid for all trunks (Default 00)
00 - Use Source and Destination MAC Address for hashing
01 - Use Source MAC Address for hashing
10 - Use Destination MAC Address for hashing
11 - Use Source Port Number for hashing
MULTICAST_HASH[7:1]-1
Reserved (Default 0x3)
Port 3-0 bit map for multicast hash. (Default 0xF)
Reserved. (Default 0xF)
Byte 0 of the CPU MAC address (Default 0)
MAC3
Zarlink Semiconductor Inc.
MAC2
ZL50404
71
MAC1
MAC0
0
(MC bit)
Data Sheet