zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 107

• Manufacturer Part Number: zl50404
• Description: Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.3.11.2
CPU Address: hF01
Accessed by CPU (RO)
13.3.11.3
CPU Address: hF02
Accessed by CPU (RO)
Bit [4]:
Bit [7:5]:
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [5:4]:
Bit [7:6]:
Bit [6:0]
Bit [7]
DCR - Device Status and Signature Register
DCR1 - Device Status Register 1
Initialization Completed (Default = 0)
This bit is reserved in unmanaged mode.
In managed mode, the CPU writes this bit with ‘1’ to indicate initialization is
completed and ready to forward packets. The ‘0' to '1' transition will toggle
TSTOUT[2] from low to high.
Reserved
1: Busy writing configuration to I²C
0: Not busy (not writing configuration to I²C)
1: Busy reading configuration from I²C
0: Not busy (not reading configuration from I²C)
1: BIST in progress
0: BIST not running
1: RAM Error
0: RAM OK
Device Signature
10: ZL50404 device
Revision
00: Initial Silicon
01: Second Silicon
Reserved
Chip initialization completed
Zarlink Semiconductor Inc.
ZL50404
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Data Sheet