zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 29

• Manufacturer Part Number: zl50404
• Description: Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

During scheduling, the TxQ manager treats the unicast queue and the multicast queue of the same class as one
logical queue. The older head of line of the two queues is forwarded first. The port control requests a FCB release
only after the EOF for the multicast frame has been read by all ports to which the frame is destined.
4.3
Frame forwarding from the CPU port to a regular transmission port is nearly the same as forwarding between
transmission ports. The only difference is that the physical destination port must be indicated in addition to the
destination MAC address.
Frame forwarding to the CPU port is nearly the same as forwarding to a regular transmission port. The only
difference is in frame scheduling.
algorithms, scheduling for the CPU port is simply based on strict priority. That is, a frame in a high priority queue will
always be transmitted before a frame in a lower priority queue. There are four output queues to the CPU and one
receive queue.
5.0
5.1
The ZL50404 search engine is optimized for high throughput searching, with enhanced features to support:
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5.2
Shortly after a frame enters the ZL50404 and is written to the Frame Data Buffer (FDB), the frame engine generates
a Switch Request, which is sent to the search engine. The switch request consists of the first 64 bytes of the frame,
which contain all the necessary information for the search engine to perform its task. When the search engine is
done, it writes to the Switch Response Queue, and the frame engine uses the information provided in that queue for
scheduling and forwarding.
In performing its task, the search engine extracts and compresses the useful information from the 64-byte switch
request. Among the information extracted are the source and destination MAC addresses, the packet’s VLAN ID,
and whether the frame is unicast or multicast or broadcast. Requests are sent to the SRAM to locate the associated
entries in the MCT table.
When all the information has been collected from the SRAM, the search engine has to compare the MAC address
on the current entry with the MAC address for which it is searching. If it is not a match, the process is repeated on
the internal MCT Table. All MCT entries other than the first of each linked list are maintained internal to the chip. If
the desired MAC address is still not found, then the result is either learning (source MAC address unknown) or
flooding (destination MAC address unknown).
If the destination MAC address belongs to a port trunk, then the trunk number is retrieved instead of the port
number. But on which port of the trunk will the frame be transmitted? This is easily computed using a hash of the
source and destination MAC addresses.
When all the information is compiled, the switch response is generated, as stated earlier. The search engine also
interacts with the CPU with regard to learning and aging.
Up to 4 K of Unicast/Multicast MAC addresses
8 groups of port trunking
Traffic classification into 2 (or 4 for MMAC) transmission priorities, and 2 drop precedence levels
Packet filtering based on MAC address, Protocol or Logical Port number
Security
Individual Flooding, Broadcast, Multicast Storm Control
MAC address learning and aging
Frame Forwarding To and From CPU
Search Engine Overview
Basic Flow
Search Engine
Instead of using the patent-pending Zarlink Semiconductor scheduling
Zarlink Semiconductor Inc.
ZL50404
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Data Sheet