zl50404 Zarlink Semiconductor, zl50404 Datasheet - Page 77

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zl50404

Manufacturer Part Number
zl50404
Description
Lightly Managed/unmanaged 5-port 10/100m Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
13.3.5.2
I²C Address h04A; CPU Address h401
Accessed by CPU and I²C (R/W)
The default setting of AGETIME_LOW/HIGH provides 300 seconds aging time. Aging time is based on the
following equation:
{AGETIME_HIGH,AGETIME_LOW} X (# of MAC entries in the memory X 800 µsec). Number of MAC entries = 4 K.
13.3.5.3
CPU Address:h403
Accessed by CPU (R/W)
Note: ECR2[2] enable/disable learning for each port.
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]:
Bit [5]
Bit [6]:
Bit [7]:
AGETIME_HIGH –MAC address aging time High
SE_OPMODE – Search Engine Operation Mode
Bit [7:0]:
Reserved. Must be 0.
Protocol filtering mode
0 – Inclusive (Default)
1 – Exclusive
Report control
1 – Disable report MAC address deletion
0 – Report MAC address deletion (MAC address is deleted from MCT after
aging time) (Default)
Delete Control
1 – Disable aging logic from removing MAC during aging
0 – MAC address entry is removed when it is old enough to be aged (Default)
However, a report is still sent to the CPU in both cases, when bit [2] = 0
Reserved. Must be 0.
1 - Report ARP packet to CPU
0 - No ARP packet reporting (Default)
Disable MCT speed-up aging
1 – Disable speed-up aging when MCT resource is low.
0 – Enable speed-up aging when MCT resource is low. (Default)
Slow Learning
1– Enable slow learning. Learning is temporary disabled when search
demand is high
0 – Learning is performed independent of search demand (Default)
High byte of the MAC address aging timer (Default 0)
Zarlink Semiconductor Inc.
ZL50404
77
Data Sheet

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