MT48H8M32LFB5-10:G Micron Technology Inc, MT48H8M32LFB5-10:G Datasheet - Page 40

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MT48H8M32LFB5-10:G

Manufacturer Part Number
MT48H8M32LFB5-10:G
Description
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H8M32LFB5-10:G

Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
17/8/7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
65mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
NOTE:
pdf: 09005aef80d460f2, source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. D 9/04 EN
1. The two AUTO REFRESH commands at T9 and T19 may be applied before either LOAD MODE REGISTER (LMR) command.
2. PRE = PRECHARGE command, LMR = LOAD MODE REGISTER command, AR = AUTO REFRESH command, ACT = ACTIVE
3. Optional refresh command.
4. The Load Mode Register for both MR/EMR and 2 Auto Refresh commands can be in any order. However, all must occur
5. Device timing is -10 with 100 MHz clock.
command, RA = Row Address, BA = Bank Address.
prior to an Active command.
See Table 14, Electrical Characteristics and Recommended AC Operating Conditions, on page 35.
DQML, DQMU
COMMAND
A0-A9, A11
BA0, BA1
A10
CKE
CLK
DQ
5
Power-up:
V
CLK stable
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T = 100µs
and
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CMS
CKS
Figure 31: Initialize And Load Mode Register
T0
NOP
t
High-Z
CMH
t
CKH
ALL BANKS
t
AS
PRE
T1
t AH
t
CK
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Load Extended
Mode Register
t AS
t AS t AH
BA0 = L,
BA1 = H
LMR 4
CODE
CODE
T3
t AH
t
MRD
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Load Mode
Register
BA0 = L,
BA1 = L
LMR 4
CODE
CODE
40
T5
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MRD
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ALL BANKS
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AS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
PRE 3
T7
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AH
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AR 4
T9
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1,2
AR 4
MOBILE SDRAM
T19
©2003 Micron Technology, Inc. All rights reserved.
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256Mb: x32
PRELIMINARY
DON’T CARE
ACT 4
T29
RA
RA
BA

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