HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 410

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 19 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits
Low Voltage Detection Interrupt (LVDI) Circuit
(When Voltages Input via ExtU and ExtD Pins are used for Detection):
Figure 19.6 shows the timing of the LVDI circuit. The LVDI circuit is enabled after a power-on
reset, however, the interrupt request is disabled. To enable the LVDI, the LVDDF and LVDUF
bits in LVDSR must be cleared to 0 and the LVDDE or LVDUE bit in LVDCR must be set to 1.
When using external compared voltage, write 0 to the VDDII bit in LVDCR, and wait for 50 µs
(t
) given by a software timer until the detection circuit has settled. Then clear the LVDDF and
LVDON
LVDUF bits to 0 and set the LVDDE or LVDUE bit to 1. After that, the output settings of ports
must be made. The initial value of the external compared voltages input on the ExtU and ExtD
pins must be higher than the Vexd voltage.
When the external comparison voltage of ExtD pin falls below the Vexd (D) (Typ. = 1.15 V)
voltage, the LVDI clears the LVDINT signal to 0 and sets the LVDDF bit in LVDSR to 1. If the
LVDDE bit is 1 at this time, an IRQ0 interrupt request is generated. In this case, the necessary
data must be saved in the external EEPROM, and a transition to standby mode or subsleep mode
must be made. Until this processing is completed, the power supply voltage must be higher than
the lower limit of the guaranteed operating voltage.
When the power-supply voltage does not fall below the Vreset1 (Typ. = 2.3 V) voltage and the
input voltage of the ExtU pin rises above Vexd (Typ. = 1.15 V) voltage, the LVDI circuit sets the
LVDINT signal to 1. If the LVDUE bit is 1 at this time, the LVDUF bit in LVDSR is set to 1 and
an IRQ0 interrupt request is generated.
If the power supply voltage falls below the Vreset1 (Typ. = 2.3 V) voltage, this LSI enters low-
voltage detection reset operation. When the voltages input on the ExtU and ExtD pins are used as
the compared voltage, ensure to use the LVDR (reset detection voltage: Typ. = 2.3 V) circuit.
Rev. 1.00 Sep. 16, 2005 Page 380 of 490
REJ09B0216-0100