HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 106

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 5 Clock Pulse Generator
Note: * To prevent the LSI from malfunctioning at the external oscillation halt, switching the clock source along
Rev. 1.00 Sep. 16, 2005 Page 76 of 490
REJ09B0216-0100
Write 1 to OSCBAKE in CKCSR
with the watchdog timer is highly recommended.
Write 1 to OSCSEL in CKCSR
LSI operates on external clock
Clear CKSWIF in CKCSR to 0
Write 1 to CKSWIE in CKCSR
Write 1 to PMRC0 in CKCSR
Write 1 to PMRC1 in CKCSR
LSI operates on on-chip oscillator clock
Figure 5.3 Flowchart of Clock Switching with Backup Function Enabled
external clock? (CKSTA in
Start (reset)
CKCSR is 1)
Switched to
Yes
No
[5]
[6]
[1]
[2]
[3]
[4]
External oscillator
halt is detected*
External
oscillator halt
is detected*
[1]
[2]
[3]
[4]
[5]
[6]
External oscillation starts to be enabled when pins
PC1 and PC0 are specified as external clock pins.
Write 0 to bit PMRC1 to input the external clock.
The external oscillator halt detecting circuit is
enabled when the external oscillation backup
function is enabled. Since this detecting circuit
operates on the on-chip oscillator clock, do not set
the on-chip oscillator to standby mode by using the
RCSTP bit in RCCR.
An interrupt to switch from the on-chip oscillator
clock to the external oscillator is enabled.
After writing 1 to the OSCSEL bit, this LSI waits
until the oscillation of the external oscillator settles.
The correspondence between Nwait, which is the
number of wait cycles for oscillation settling, and
Nstby, which is the number of wait cycles for
oscillation settling when returning from standby
mode, is as follows:
Nstby
Nstby is set by bits STS[2:0] in SYSCR1. For
details, see section 6.1.1, System Control Register
1 (SYSCR1).
While waiting for external oscillation settling, this
LSI is not halted but continues to operate on the on-
chip oscillator clock. Read the CKSTA bit in CKCSR
to ensure whether or not clocks are switched. When
the oscillation settles, this LSI switches the system
clocks to the external clock. If the external oscillator
is halted, then set the clock switching interrupt
request flag.
If this LSI detects the external oscillator halt, it
switches the system clocks to the on-chip oscillator
clock, and sets the clock switching interrupt request
flag.
Nwait
2
Nstby
Exception handling
for clock switching
LSI operates on
on-chip oscillator clock