HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 240

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 13 Timer Z
13.3.11 Timer Status Register (TSR)
TSR indicates generation of an overflow/underflow of TCNT and a compare match/input capture
of GRA, GRB, GRC, and GRD. These flags are interrupt sources. If an interrupt is enabled by a
corresponding bit in TIER, TSR requests an interrupt for the CPU. Timer Z has two TSR registers,
one for each channel.
Rev. 1.00 Sep. 16, 2005 Page 210 of 490
REJ09B0216-0100
Bit
7, 6
5
4
3
Bit Name

UDF*
OVF
IMFD
Initial
value
All 1
0
0
0
R/W

R/W
R/W
R/W
Reserved
These bits are always read as 1.
Underflow Flag
[Setting condition]
•
[Clearing condition]
•
Overflow Flag
[Setting condition]
•
[Clearing condition]
•
Input Capture/Compare Match Flag D
[Setting conditions]
•
•
[Clearing condition]
•
Description
When TCNT_1 underflows
When 0 is written to UDF after reading UDF = 1
When the TCNT value underflows
When 0 is written to OVF after reading OVF = 1
When TCNT = GRD and GRD is functioning as output
compare register
When TCNT value is transferred to GRD by input
capture signal and GRD is functioning as input
capture register
When 0 is written to IMFD after reading IMFD = 1