HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 23

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 13.55 Contention between TCNT Write and Overflow................................................... 262
Figure 13.56 Contention between GR Read and Input Capture.................................................. 263
Figure 13.57 Contention between Count Clearing and Increment Operations
Figure 13.58 Contention between GR Write and Input Capture................................................. 265
Figure 13.59 When Compare Match and Bit Manipulation Instruction to TOCR
Section 14 Watchdog Timer
Figure 14.1 Block Diagram of Watchdog Timer ........................................................................ 267
Figure 14.2 Watchdog Timer Operation Example...................................................................... 271
Section 15 14-Bit PWM
Figure 15.1 Block Diagram of 14-Bit PWM .............................................................................. 273
Figure 15.2 Waveform Output by 14-Bit PWM ......................................................................... 276
Section 16 Serial Communication Interface 3 (SCI3)
Figure 16.1 Block Diagram of SCI3 ........................................................................................... 279
Figure 16.2 Data Format in Asynchronous Communication ...................................................... 295
Figure 16.3 Relationship between Output Clock and Transfer Data Phase
Figure 16.4 Sample SCI3 Initialization Flowchart ..................................................................... 296
Figure 16.5 Example of SCI3 Transmission in Asynchronous Mode
Figure 16.6 Sample Serial Transmission Data Flowchart (Asynchronous Mode)...................... 298
Figure 16.7 Example of SCI3 Reception in Asynchronous Mode
Figure 16.8 Sample Serial Reception Data Flowchart (Asynchronous Mode) (1)...................... 301
Figure 16.8 Sample Serial Reception Data Flowchart (Asynchronous Mode) (2)...................... 302
Figure 16.9 Data Format in Clock Synchronous Communication .............................................. 303
Figure 16.10 Example of SCI3 Transmission in Clock Synchronous Mode .............................. 304
Figure 16.11 Sample Serial Transmission Flowchart (Clock Synchronous Mode) .................... 305
Figure 16.12 Example of SCI3 Reception in Clock Synchronous Mode.................................... 306
Figure 16.13 Sample Serial Reception Flowchart (Clock Synchronous Mode) ......................... 307
Figure 16.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
Figure 16.15 Example of Inter-Processor Communication Using Multiprocessor Format
Figure 16.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 312
Figure 16.17 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 314
Figure 16.17 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 315
(Asynchronous Mode) (Example with 8-Bit Data, Parity, Two Stop Bits) ............. 295
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 297
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 299
(Clock Synchronous Mode)................................................................................... 309
(Transmission of Data H'AA to Receiving Station A)........................................... 311
by Input Capture.................................................................................................... 264
Occur at the Same Timing..................................................................................... 266
Rev. 1.00 Sep. 16, 2005 Page xxiii of xxx