HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 386

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 17 I
17.7
17.7.1
In master mode, when the start/stop conditions are issued (retransmitted) at the specific timing
under the following condition 1 or 2, such conditions may not be output successfully. To avoid
this, issue (retransmit) the start/stop conditions after the fall of the ninth clock is confirmed. Check
the SCLO bit in the I
1. When the rising of SCL falls behind the time specified in section 17.6, Bit Synchronous
2. When the bit synchronous circuit is activated by extending the low period of eighth and ninth
17.7.2
If the WAIT bit is set to 1, and the SCL signal is driven low for two or more transfer clocks by the
slave device at the eighth and ninth clocks, the high period of ninth clock may be shortened. To
avoid this, set the WAIT bit in ICMR to 0.
Rev. 1.00 Sep. 16, 2005 Page 356 of 490
REJ09B0216-0100
Circuit, by the load of the SCL bus (load capacitance or pull-up resistance)
clocks, that is driven by the slave device
Usage Notes
Issue (Retransmission) of Start/Stop Conditions
WAIT Setting in I
2
C Bus Interface 2 (IIC2)
2
C control register 2 (IICR2) to confirm the fall of the ninth clock.
2
C Bus Mode Register (ICMR)