HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 305

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.3
The 14-bit PWM has the following registers.
• PWM control register (PWCR)
• PWM data register U (PWDRU)
• PWM data register L (PWDRL)
15.3.1
PWCR selects the conversion period.
[Legend]
tφ:
15.3.2
PWDRU and PWDRL indicate high level width in one PWM waveform cycle. PWDRU and
PWDRL are 14-bit write-only registers, with the upper 6 bits assigned to PWDRU and the lower 8
bits to PWDRL. When read, all bits are always read as 1.
Both PWDRU and PWDRL are accessible only in bytes. Note that the operation is not guaranteed
if word access is performed. When 14-bit data is written in PWDRU and PWDRL, the contents
are latched in the PWM waveform generator and the PWM waveform generation data is updated.
When writing the 14-bit data, the order is as follows: PWDRL to PWDRU.
PWDRU and PWDRL are initialized to H'C000.
Bit
7 to 1
0
Period of PWM clock input
Bit Name

PWCR0
Register Descriptions
PWM Control Register (PWCR)
PWM Data Registers U and L (PWDRU, PWDRL)
Initial
Value
All 1
0
R/W

R/W
Description
Reserved
These bits are always read as 1, and cannot be modified.
Clock Select
0: The input clock is φ/2 (tφ = 2/φ)
1: The input clock is φ/4 (tφ = 4/φ)
 The conversion period is 16384/φ, with a minimum
 The conversion period is 32768/φ, with a minimum
modulation width of 1/φ
modulation width of 2/φ
Rev. 1.00 Sep. 16, 2005 Page 275 of 490
Section 15 14-Bit PWM
REJ09B0216-0100