DSP56309EVM Freescale Semiconductor, DSP56309EVM Datasheet - Page 40

KIT EVALUATION FOR XC56309

DSP56309EVM

Manufacturer Part Number
DSP56309EVM
Description
KIT EVALUATION FOR XC56309
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of DSP56309EVM

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Description/function
Audio DSPs
Product
Audio Modules
For Use With/related Products
DSP56309
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Signals/Connections
2.9 Enhanced Synchronous Serial Interface 1 (ESSI1)
2-16
SC10
PD0
SC11
PD1
SC12
PD2
Signal
Name
Input or Output
Input/Output
Input or Output
Input/Output
Input or Output
Type
Table 2-13. Enhanced Synchronous Serial Interface 1 (ESSI1)
Ignored input
Ignored input
Ignored input
State During
Reset
1, 2
DSP56309 User’s Manual, Rev. 1
Serial Control 0
Functions in either Synchronous or Asynchronous mode. For Asynchronous
mode, this signal is the receive clock I/O (Schmitt-trigger input). For
Synchronous mode, this signal is either for Transmitter 1 output or Serial I/O
Flag 0.
Port D 0
The default configuration following reset is GPIO. For PD0, signal direction is
controlled through the Port D Direction Register (PRRD).
This signal is configured as SC10 or PD0 through the Port D Control Register
(PCRD). This input is 5 V tolerant.
Serial Control 1
Functions in either Synchronous or Asynchronous mode. For Asynchronous
mode, this signal is the receiver frame sync I/O. For Synchronous mode, this
signal is either Transmitter 2 output or Serial I/O Flag 1.
Port D 1
The default configuration following reset is GPIO. For PD1, signal direction is
controlled through PRRD.
This signal is configured as SC11 or PD1 through PCRD. This input is 5 V
tolerant.
Serial Control Signal 2
The frame sync for both the transmitter and receiver in Synchronous mode,
and for the transmitter only in Asynchronous mode. When configured as an
output, this signal is the internally generated frame sync signal. When
configured as an input, this signal receives an external frame sync signal for
the transmitter (and the receiver in synchronous operation).
Port D 2
The default configuration following reset is GPIO. For PD2, signal direction is
controlled through PRRD.
This signal is configured as SC12 or PD2 through PCRD. This input is 5 V
tolerant.
Signal Description
Freescale Semiconductor

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