DSP56309EVM Freescale Semiconductor, DSP56309EVM Datasheet - Page 19

• Manufacturer Part Number: DSP56309EVM
• Description: KIT EVALUATION FOR XC56309
• Manufacturer: Freescale Semiconductor
• Type: DSPr

Specifications of DSP56309EVM

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Description/function: Audio DSPs
• Product: Audio Modules
• For Use With/related Products: DSP56309
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

register links all device signals into a single shift register. The test logic, implemented utilizing
static logic design, is independent of the device system logic. For details on the JTAG port,
consult the DSP56300 Family Manual.
The OnCE module interacts with the DSP56300 core and its peripherals nonintrusively so that
you can examine registers, memory, or internal peripherals. This facilitates hardware and
software development on the DSP56300 core processor. OnCE module functions are provided
through the JTAG TAP signals. For details on the OnCE module, consult the DSP56300 Family
Manual.
1.6.6 Internal Memory
The memory space of the DSP56300 core is partitioned into program, X data, and Y data
memory space. The data memory space is divided into X and Y data memory in order to work
with the two address ALUs and to feed two operands simultaneously to the data ALU. Memory
space includes internal RAM and ROM and can be expanded off-chip under software control. For
details on internal memory, see Chapter 3, Memory Configuration. Program RAM, instruction
cache, X data RAM, and Y data RAM size are programmable, as shown in Table 1-2.
There is an internal 192 × 24-bit bootstrap ROM.
1.6.7 External Memory Expansion
Memory can be expanded externlly as follows:
Further features of external memory include the following:
Freescale Semiconductor
Instruction
Data memory expansion to two 256 K × 24-bit word memory spaces using the standard
external address lines
Program memory expansion to one 256 K × 24-bit words memory space using the
standard external address lines
External memory expansion port
Simultaneous glueless interface to static random access memory (SRAM) and dynamic
random access memory (DRAM)
disabled
disabled
enabled
enabled
Cache
disabled
disabled
enabled
enabled
Switch
Mode
Program RAM
20480 × 24-bit
19456 × 24-bit
24576 × 24-bit
23552 × 24-bit
Table 1-3. Internal Memory
DSP56309 User’s Manual, Rev. 1
Size
1024 × 24-bit
1024 × 24-bit
Cache Size
Instruction
0
0
X Data RAM Size
7168 × 24-bit
7168 × 24-bit
5120 × 24-bit
5120 × 24-bit
DSP56300 Core Functional Blocks
Y Data RAM Size
7168 × 24-bit
7168 × 24-bit
5120 × 24-bit
5120 × 24-bit
1-9