C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 274

BOARD TARGET/PROTO W/C8051F930

C8051F930-TB

Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F930-TB

Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
C8051F93x-C8051F92x
SFR Definition 24.4. SPInDAT: SPI Data
SFR Addresses: SPI0DAT = 0xA3, SPI1DAT = 0x86 
SFR Pages: SPI0DAT = 0x0, SPI1DAT = 0x0
274
Name
Reset
Bit
7:0
Type
Bit
SPInDAT
Name
7
0
SPIn Transmit and Receive Data.
The SPInDAT register is used to transmit and receive SPIn data. Writing data to
SPInDAT places the data into the transmit buffer and initiates a transfer when in
Master Mode. A read of SPInDAT returns the contents of the receive buffer.
0
6
5
0
Rev. 1.1
SPInDAT[7:0]
4
0
R/W
Function
3
0
2
0
1
0
0
0

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