C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 219
![BOARD TARGET/PROTO W/C8051F930](/photos/9/25/92560/c8051f930-tb_sml.jpg)
C8051F930-TB
Manufacturer Part Number
C8051F930-TB
Description
BOARD TARGET/PROTO W/C8051F930
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F930-TB
Contents
Board
Processor To Be Evaluated
C8051F930
Processor Series
C8051F9xx
Data Bus Width
8 bit
Interface Type
I2C, UART, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
0.9 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F930
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1472
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SFR Definition 21.1. XBR0: Port I/O Crossbar Register 0
SFR Page = 0x0; SFR Address = 0xE1
Note: SPI0 can be assigned either 3 or 4 Port I/O pins.
Reset
Name
Type
Bit
Bit
7
6
5
4
3
2
1
0
SYSCKE SYSCLK Output Enable.
CP1AE
CP1AE
CP0AE
SMB0E
URT0E
SPI0E
Name
CP1E
CP0E
R/W
7
0
Comparator1 Asynchronous Output Enable.
0: Asynchronous CP1 output unavailable at Port pin.
1: Asynchronous CP1 output routed to Port pin.
Comparator1 Output Enable.
0: CP1 output unavailable at Port pin.
1: CP1 output routed to Port pin.
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 output unavailable at Port pin.
1: Asynchronous CP0 output routed to Port pin.
Comparator0 Output Enable.
0: CP1 output unavailable at Port pin.
1: CP1 output routed to Port pin.
0: SYSCLK output unavailable at Port pin.
1: SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pin.
1: SDA and SCL routed to Port pins.
SPI0 I/O Enable
0: SPI0 I/O unavailable at Port pin.
1: SCK, MISO, and MOSI (for SPI0) routed to Port pins.
UART0 Output Enable.
0: UART I/O unavailable at Port pin.
1: TX0 and RX0 routed to Port pins P0.4 and P0.5.
CP1E
NSS (for SPI0) routed to Port pin only if SPI0 is configured to 4-wire mode.
R/W
0
6
CP0AE
R/W
5
0
CP0E
R/W
Rev. 1.1
4
0
C8051F93x-C8051F92x
Function
SYSCKE
R/W
3
0
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0
219
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