C8051F930-TB Silicon Laboratories Inc, C8051F930-TB Datasheet - Page 214

• Manufacturer Part Number: C8051F930-TB
• Description: BOARD TARGET/PROTO W/C8051F930
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F930-TB

• Contents: Board
• Processor To Be Evaluated: C8051F930
• Processor Series: C8051F9xx
• Data Bus Width: 8 bit
• Interface Type: I2C, UART, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 0.9 V to 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F930
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1472

C8051F93x-C8051F92x
21.1.3. Interfacing Port I/O to 5 V Logic
All Port I/O configured for digital, open-drain operation are capable of interfacing to digital logic operating at
a supply voltage higher than VDD/DC+ and less than 5.25 V. An external pull-up resistor to the higher
supply voltage is typically required for most systems.
Important Note: In a multi-voltage interface, the external pull-up resistor should be sized to allow a current
of at least 150 µA to flow into the Port pin when the supply voltage is between (VDD/DC+ plus 0.4 V) and
(VDD/DC+ plus 1.0 V). Once the Port pad voltage increases beyond this range, the current flowing into the
Port pin is minimal.
21.1.4. Increasing Port I/O Drive Strength
Port I/O output drivers support a high and low drive strength; the default is low drive strength. The drive
strength of a Port I/O can be configured using the PnDRV registers. See Section “4. Electrical
Characteristics” on page 43 for the difference in output drive strength between the two modes.
21.2. Assigning Port I/O Pins to Analog and Digital Functions
Port I/O pins P0.0–P2.6 can be assigned to various analog, digital, and external interrupt functions. The
Port pins assuaged to analog functions should be configured for analog I/O and Port pins assuaged to dig-
ital or external interrupt functions should be configured for digital I/O.
21.2.1. Assigning Port I/O Pins to Analog Functions
Table 21.1 shows all available analog functions that need Port I/O assignments. Port pins selected for
these analog functions should have their digital drivers disabled (PnMDOUT.n = 0 and Port Latch =
1) and their corresponding bit in PnSKIP set to 1. This reserves the pin for use by the analog function
and does not allow it to be claimed by the Crossbar. Table 21.1 shows the potential mapping of Port I/O to
each analog function.
214
Analog Function
ADC Input
Comparator0 Input
Comparator1 Input
Voltage Reference (VREF0)
Analog Ground Reference (AGND)
Current Reference (IREF0)
External Oscillator Input (XTAL1)
External Oscillator Output (XTAL2)
Table 21.1. Port I/O Assignment for Analog Functions
Rev. 1.1
Assignable Port Pins
Potentially
P0.0–P2.6
P0.0–P2.6
P0.0–P2.6
P0.0
P0.1
P0.7
P0.2
P0.3
IREF0CN, PnSKIP
OSCXCN, PnSKIP
OSCXCN, PnSKIP
ADC0MX, PnSKIP
CPT0MX, PnSKIP
CPT1MX, PnSKIP
REF0CN, PnSKIP
REF0CN, PnSKIP
SFR(s) used for
Assignment