DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 45

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

Appendix A
Restoring the MAX II CPLD to the Factory Settings
Restoring the MAX II CPLD to the Factory Settings
February 2011 Altera Corporation
f
5. Click Start to download the selected configuration file to the FPGA. Configuration
6. On the Windows Start menu, click All Programs > Altera > Nios II EDS > Nios II
7. In the Nios II command shell, navigate to the <install
8. After all flash programming completes, cycle the POWER switch (SW1) off then
9. Using the Quartus II Programmer, click Add File and select <install
10. Turn on the Program/Configure option for the added file.
11. Click Start to download the selected configuration file to the FPGA. Configuration
12. Cycle the POWER switch (SW1) off then on to load and run the restored factory
13. The restore script cannot restore the board’s MAC address automatically. In the
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
website.
This section describes how to restore the original factory contents to the MAX II CPLD
on the FPGA development board. Make sure you have the Nios II EDS installed, and
perform the following instructions:
1. Set the board switches to the factory default settings described in
is complete when the progress bar reaches 100%. The CONF DONE LED (D14)
and the four user LEDs (D7-D10) illuminate indicating that the flash device is
ready for programming.
Command Shell.
dir>\kits\arriaIIGX_2agx125_fpga\factory_recovery directory and type the
following command to run the restore script:
./restore.sh r
Restoring the flash memory might take several minutes. Follow any instructions
that appear in the Nios II command shell.
on.
dir>\kits\arriaIIGX_2agx125_fpga\factory_recovery\ArriaIIGX_2agx125_dev_
bup.sof.
is complete when the progress bar reaches 100%. The CONF DONE LED (D14)
and the four user LEDs (D7-D10) illuminate indicating the flash memory device is
now restored with the factory contents.
design.
Nios II command shell, type the following Nios II EDS command:
nios2-terminal r
and follow the instructions in the terminal window to generate a unique MAC
address.
Switch Settings” on page
1
Uninstalling the shunt jumper from jumper J9 pins 1-2 includes the MAX II
device in the JTAG chain.
4–2.
Arria II GX FPGA Development Kit
Arria II GX FPGA Development Kit User Guide
page of the Altera
“Factory Default
A–5