DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 16

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

4–2
Factory Default Switch Settings
Table 4–1. SW3 Dip Switch Settings
Arria II GX FPGA Development Kit User Guide
1
2
3
4
Switch
PCIe x1
PCIe x4
PCIe x8
—
Board
Label
This section shows the factory switch settings for the Arria II GX FPGA development
board.
Figure 4–1. Switch Locations and Default Settings on the FPGA Development Board
To restore the switches to their factory default settings, perform the following steps:
1. Set DIP switch bank (SW3) to match
J9
Figure 4–1
JTAG Control
Switch 1 has the following options:
■
■
Switch 2 has the following options:
■
■
Switch 3 has the following options:
■
■
■
Jumpers
When off, the PCIe card PCIE_PRSNT2n_x1 signal is connected to PCIe
card PRSNT1 signal.
When on, the PCIe card PCIE_PRSNT2n_x1 signal floats.
When off, the PCIe card PCIE_PRSNT2n_x4 signal is connected to PCIe
card PRSNT1 signal.
When on, the PCIe card PCIE_PRSNT2n_x4 signal floats.
When off, the PCIe card PCIE_PRSNT2n_x8 signal is connected to PCIe
card PRSNT1 signal.
When on, the PCIe card PCIE_PRSNT2n_x8 signal floats.
—
shows the switch locations and the default position of each switch.
PCIe MODE
DIP Switch
Function
ON
SW3
1
DIP Switch
2
3
ON
User
1
SW2
Table 4–1
4
2
3
4
ON = 0
OFF = 1
and
Figure
Board Settings
Chapter 4: Development Board Setup
DIP Switch
ON
1 2 3 4 5 6 7 8
February 2011 Altera Corporation
SW4
4–1.
Factory Default Switch Settings
ON = 0
OFF = 1
Position
Default
On
On
On
—