DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 42

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

A–2
Preparing Design Files for Flash Programming
Arria II GX FPGA Development Kit User Guide
Creating Flash Files Using the Nios II EDS
f
c
Table A–1. Byte Address Flash Memory Map (Part 2 of 2)
Altera recommends that you do not overwrite the factory hardware and factory
software images unless you are an expert with the Altera tools. If you unintentionally
overwrite the factory hardware or factory software image, refer to
Flash Device to the Factory Settings” on page
You can obtain designs containing prepared .flash files from the
Development Kit
custom design.
The Nios II EDS sof2flash command line utility converts your Quartus II-compiled
.sof into the .flash format necessary for the flash device. Similarly, the Nios II EDS
elf2flash command line utility converts your compiled and linked Executable and
Linking Format File (.elf) software design to .flash. After your design files are in the
.flash format, use the Board Update Portal or the Nios II EDS
nios2-flash-programmer utility to write the .flash files to the user hardware 1 and
user software locations of the flash memory.
For more information about Nios II EDS software tools and practices, refer to the
Embedded Software Development
If you have an FPGA design developed using the Quartus II software, and software
developed using the Nios II EDS, follow these instructions:
1. On the Windows Start menu, click All Programs > Altera > Nios II EDS > Nios II
User hardware 1
Factory hardware
PFL option bits
Board information
Ethernet option bits
User design reset vector
Command Shell.
Block Description
page of the Altera website or create .flash files from your own
6,357 KB
6,357 KB
32 KB
32 KB
32 KB
32 KB
page of the Altera website.
Size
0x00C5FFFF
0x00640000
0x0063FFFF
0x00020000
0x0001FFFF
0x00018000
0x00017FFF
0x00010000
0x0000FFFF
0x00008000
0x00007FFF
0x00000000
A–4.
Address Range
Preparing Design Files for Flash Programming
February 2011 Altera Corporation
Arria II GX FPGA
“Restoring the
Appendix A