C8051T630DK Silicon Laboratories Inc, C8051T630DK Datasheet - Page 95
![KIT DEV FOR C8051T630 FAMILY](/photos/9/23/92351/c8051t630dk_sml.jpg)
C8051T630DK
Manufacturer Part Number
C8051T630DK
Description
KIT DEV FOR C8051T630 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051T630DK
Contents
Board, daughter boards, power adapter, cables, documentation and software
Processor To Be Evaluated
C8051T63x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T630, T631, T632, T633, T634 and T635 MCUs
For Use With
336-1465 - BOARD SOCKET DAUGHTER 20-QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1464
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- Download datasheet (2Mb)
18. Reset Sources
Reset circuitry allows the controller to be easily placed in a predefined default condition. On entry to this
reset state, the following occur:
All SFRs are reset to the predefined values noted in the SFR detailed descriptions. The contents of internal
data memory are unaffected during a reset; any previously stored data is preserved. However, since the
stack pointer SFR is reset, the stack is effectively lost, even though the data on the stack is not altered.
The Port I/O latches are reset to 0xFF (all logic ones) in open-drain mode. Weak pullups are enabled dur-
ing and after the reset. For V
exits the reset state.
On exit from the reset state, the program counter (PC) is reset, and the system clock defaults to the inter-
nal oscillator. The Watchdog Timer is enabled with the system clock divided by 12 as its clock source. Pro-
gram execution begins at location 0x0000.
EXTCLK
CIP-51 halts program execution
Special Function Registers (SFRs) are initialized to their defined reset values
External Port pins are forced to a known state
Interrupts and timers are disabled
Frequency
Oscillator
Oscillator
Oscillator
External
Internal
Drive
Low
Px.x
Px.x
Clock Select
System
Clock
DD
Comparator 0
+
-
Monitor and power-on resets, the RST pin is driven low until the device
Figure 18.1. Reset Sources
Detector
Missing
C0RSEF
Clock
(one-
shot)
Microcontroller
EN
Extended Interrupt
CIP-51
Handler
Core
WDT
PCA
EN
Rev. 1.0
VDD
System Reset
Supply
Monitor
+
-
Enable
C8051T630/1/2/3/4/5
(Software Reset)
SWRSF
'0'
Power On
Reset
Operation
EPROM
Illegal
(wired-OR)
Reset
Funnel
/RST
95
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