C8051T630DK Silicon Laboratories Inc, C8051T630DK Datasheet - Page 191

• Manufacturer Part Number: C8051T630DK
• Description: KIT DEV FOR C8051T630 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051T630DK

• Contents: Board, daughter boards, power adapter, cables, documentation and software
• Processor To Be Evaluated: C8051T63x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051T630, T631, T632, T633, T634 and T635 MCUs
• For Use With: 336-1465 - BOARD SOCKET DAUGHTER 20-QFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1464

25. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and three 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled. The counter/timer is driven by a
programmable timebase that can select between six sources: system clock, system clock divided by four,
system clock divided by twelve, the external oscillator clock source divided by 8, Timer 0 overflows, or an
external clock signal on the ECI input pin. Each capture/compare module may be configured to operate
independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Fre-
quency Output, 8 to 11-Bit PWM, or 16-Bit PWM (each mode is described in Section
“25.3. Capture/Compare Modules” on page 194). The external oscillator clock option is ideal for real-time
clock (RTC) functionality, allowing the PCA to be clocked by a precision external oscillator while the inter-
nal oscillator drives the system clock. The PCA is configured and controlled through the system controller's
Special Function Registers. The PCA block diagram is shown in Figure 25.1
Important Note: The PCA Module 2 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled.
See Section 25.4 for details.
Figure 25.1. PCA Block Diagram
Capture/Compare
Module 0
SYSCLK/12
Timer 0 Overflow
SYSCLK
External Clock/8
SYSCLK/4
ECI
Crossbar
Port I/O
Rev. 1.0
Capture/Compare
Module 1
CLOCK
MUX
PCA
C8051T630/1/2/3/4/5
16-Bit Counter/Timer
Capture/Compare
Module 2 / WDT
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