STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 63

• Manufacturer Part Number: STEVAL-ISB005V1
• Description: BOARD EVAL CHARGER ST7260/L6924D
• Manufacturer: STMicroelectronics
• Type: Battery Managementr

Specifications of STEVAL-ISB005V1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: L6924, ST72F63BK6M1
• Primary Attributes: 1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
• Secondary Attributes: Powered by Wall Adaptor Also, LED Status Indicators
• Input Voltage: 5 V
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: L6924D, ST7260
• Other names: 497-8428

ST7260xx
12.4.6
12.4.7
Summary of timer modes
Table 30.
1. See note 4 in
2. See note 5 in
3. See note 4 in
16-bit timer registers
Each timer is associated with three control and status registers, and with six pairs of data
registers (16-bit values) relating to the two input captures, the two output compares, the
counter and the alternate counter.
Control Register 1 (CR1)
Table 31.
Input Capture
(1 and/or 2)
Output Compare
(1 and/or 2)
One Pulse mode
PWM mode
CR1
Bit
M
7
6
5
ICIE
R/W
7
Mode
Name
OCIE
TOIE
ICIE
Summary of timer modes
CR1 register description
Input Capture Interrupt Enable
Output Compare Interrupt Enable
Timer Overflow Interrupt Enable
One pulse mode on page
One pulse mode on page
Pulse width modulation mode on page
OCIE
R/W
0: Interrupt is inhibited.
1: A timer interrupt is generated whenever the ICF1 or ICF2 bit of the SR register is
set.
0: Interrupt is inhibited.
1: A timer interrupt is generated whenever the OCF1 or OCF2 bit of the SR register
is set.
0: Interrupt is inhibited.
1: A timer interrupt is enabled whenever the TOF bit of the SR register is set.
6
capture 1
Input
Yes
No
TOIE
R/W
5
58.
58.
Not recommended
Not recommended
FOLV2
R/W
4
capture 2
Input
Yes
60.
Timer resources
Function
FOLV1
R/W
3
(1)
(3)
compare 1
OLVL2
R/W
Output
2
Yes
No
Reset value: 0000 0000 (00h)
Watchdog timer (WDG)
IEDG1
R/W
1
compare 2
Partially
Output
Yes
No
OLVL1
R/W
(2)
0
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