STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 15

• Manufacturer Part Number: STEVAL-ISB005V1
• Description: BOARD EVAL CHARGER ST7260/L6924D
• Manufacturer: STMicroelectronics
• Type: Battery Managementr

Specifications of STEVAL-ISB005V1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: L6924, ST72F63BK6M1
• Primary Attributes: 1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
• Secondary Attributes: Powered by Wall Adaptor Also, LED Status Indicators
• Input Voltage: 5 V
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: L6924D, ST7260
• Other names: 497-8428

ST7260xx
Table 4.
Table 5.
Vector address
Address
000Dh to
FFE0h-FFEDh
FFEEh-FFEFh
FFFCh-FFFDh
FFFEh-FFFFh
FFFAh-FFFBh
FFF0h-FFF1h
FFF2h-FFF3h
FFF4h-FFF5h
FFF6h-FFF7h
FFF8h-FFF9h
000Ch
000Ah
000Bh
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
0010h
to
to
Interrupt vector map
Hardware register memory map
.
Port A
Port B
Port C
Block
MISC
WDG
ITC
USB end suspend mode interrupt vector
Flash start programming interrupt vector
TRAP (software) interrupt vector
Register label
IT1 to IT8 interrupt vector
WDGCR
TIMER interrupt vector
PCDDR
PBDDR
PADDR
MISCR
ITIFRE
PCDR
PBDR
PADR
USB interrupt vector
SCI interrupt vector
Reserved area
Reserved area
RESET vector
Description
Port A Data Direction Register
Port B Data Direction Register
Port C Data Direction Register
Watchdog Control Register
Miscellaneous Register
Port A Data Register
Port B Data Register
Port C Data Register
Interrupt Register
Reserved (2 bytes)
Reserved (2 bytes)
Reserved (4 bytes)
Register name
Masked by
None
None
I- bit
I- bit
I- bit
I- bit
I- bit
I- bit
External interrupts
External interrupt
Internal interrupt
Internal interrupt
Internal interrupt
Internal interrupt
CPU interrupt
Remarks
1111 x000b
1111 x000b
Register & memory map
status
Reset
7Fh
00h
00h
00h
00h
00h
00h
Exit from Halt
Remarks
mode
Yes
Yes
Yes
Yes
No
No
No
No
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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