STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 106

• Manufacturer Part Number: STEVAL-ISB005V1
• Description: BOARD EVAL CHARGER ST7260/L6924D
• Manufacturer: STMicroelectronics
• Type: Battery Managementr

Specifications of STEVAL-ISB005V1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: L6924, ST72F63BK6M1
• Primary Attributes: 1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
• Secondary Attributes: Powered by Wall Adaptor Also, LED Status Indicators
• Input Voltage: 5 V
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: L6924D, ST7260
• Other names: 497-8428

Instruction set
106/139
Table 53.
Using a pre-byte
The instructions are described with one to four bytes.
In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three
different prebyte opcodes are defined. These prebytes modify the meaning of the instruction
they precede.
The whole instruction becomes:
PC-2
PC-1
PC
PC+1
These prebytes enable instruction in Y as well as indirect addressing modes to be
implemented. They precede the opcode of the instruction in X or the instruction using direct
addressing mode. The prebytes are:
PDY 90
PIX 92
PIY 91
Load and Transfer
Stack operation
Increment/Decrement
Compare and Tests
Logical operations
Bit Operation
Conditional Bit Test and Branch
Arithmetic operations
Shift and Rotates
Unconditional Jump or Call
Conditional Branch
Interruption management
Condition Code Flag modification
Instruction groups
Group
addressing mode by a Y one.
mode to an instruction using the corresponding indirect addressing mode.
It also changes an instruction using X indexed addressing mode to an
instruction using indirect X indexed addressing mode.
End of previous instruction
Prebyte
Opcode
Additional word (0 to 2) according to the number of bytes required to compute
the effective address
Replace an X based instruction using immediate, direct, indexed, or inherent
Replace an instruction using direct, direct bit, or direct relative addressing
Replace an instruction using X indirect indexed addressing mode by a Y one.
PUSH
BSET
TRAP
BTJT
JRxx
AND
ADC
JRA
INC
SLL
SIM
CP
LD
BRES
BTJF
POP
DEC
ADD
CLR
TNZ
SRL
JRT
WFI
RIM
OR
HALT
RSP
BCP
XOR
SUB
SRA
SCF
JRF
Instruction
IRET
SBC
RLC
RCF
CPL
JP
CALL
NEG
MUL
RRC
CALLR
SWAP
NOP RET
SLA
ST7260xx