STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 37

BOARD EVAL CHARGER ST7260/L6924D

STEVAL-ISB005V1

Manufacturer Part Number
STEVAL-ISB005V1
Description
BOARD EVAL CHARGER ST7260/L6924D
Manufacturer
STMicroelectronics
Type
Battery Managementr
Datasheets

Specifications of STEVAL-ISB005V1

Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
L6924, ST72F63BK6M1
Primary Attributes
1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
Secondary Attributes
Powered by Wall Adaptor Also, LED Status Indicators
Input Voltage
5 V
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
L6924D, ST7260
Other names
497-8428

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STEVAL-ISB005V1
Manufacturer:
STMicroelectronics
Quantity:
1
ST7260xx
Note:
Note:
Caution:
10.2.1
1
2
In this mode, writing “0” or “1” to the DR register applies this digital value to the I/O pin
through the latch. Therefore, the previously saved value is restored when the DR register is
read.
The interrupt function is disabled in this mode.
Alternate function
When an on-chip peripheral is configured to use a pin, the alternate function is automatically
selected. This alternate function takes priority over standard I/O programming. When the
signal is coming from an on-chip peripheral, the I/O pin is automatically configured in output
mode (push-pull or open drain according to the peripheral).
When the signal is going to an on-chip peripheral, the I/O pin has to be configured in input
mode. In this case, the pin’s state is also digitally readable by addressing the DR register.
Input pull-up configuration can cause an unexpected value at the input of the alternate
peripheral input.
When the on-chip peripheral uses a pin as input and output, this pin must be configured as
an input (DDR = 0).
The alternate function must not be activated as long as the pin is configured as an input with
interrupt in order to avoid generating spurious interrupts.
Port A
Table 14.
1. Reset state
2. Not available on SO24
Port A
PA6
PA0
PA3
PA4
PA5
PA7
(2)
Port A0, A3, A4, A5, A6, A7 description
with pull-up
with pull-up
with pull-up
with pull-up
with pull-up
with pull-up
Input
(1)
I/O
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
Output
IT1 Schmitt triggered
IT2 Schmitt triggered
IT3 Schmitt triggered
IT4 Schmitt triggered
MCO (Main Clock
Timer EXTCLK
Timer OCMP1
Timer OCMP2
Timer ICAP1
Timer ICAP2
Output)
Signal
input
input
input
input
Alternate function
CC0 = 1 (Timer CR2)
MCO = 1 (MISCR)
IT1E = 1 (ITIFRE)
IT2E = 1 (ITIFRE)
IT3E = 1 (ITIFRE)
IT4E = 1 (ITIFRE)
Condition
OC1E = 1
OC2E = 1
CC1 =1
I/O ports
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