ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 94

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.12
7.13
7.14
7.15
Table 7-8.
8077H–AVR–12/09
Address
Address
Address
+0x0C
+0x0D
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x08
+0x09
+0x0A
+0x0B
+0x0E
+0x0F
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
Offset
0x00
Register Summary - Clock
Register Summary - Oscillator
Register Summary - DFLL32M/DFLL2M
Crystal Oscillator Failure Interrupt Vector Summary
Name
Name
Name
XOSCCTRL
RC32KCAL
DFLLCTRL
XOSCFAIL
Crystal Oscillator Failure Interrupt vector and its word offset address Crystal Oscillator Failure interrupt base
RTCCTRL
Reserved
Reserved
Reserved
Reserved
PLLCTRL
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PSCTRL
STATUS
COMP0
COMP1
COMP2
COMP2
LOCK
CTRL
CTRL
CTRL
CALA
CALB
OSCF_vect
Bit 7
Bit 7
Bit 7
Source
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
FRQRANGE[1:0]
PLLSRC[1:0]
Bit 6
Bit 6
Bit 6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Interrupt Description
Crystal Oscillator Failure Interrupt Vector (NMI)
X32KLPM
Bit 5
Bit 5
Bit 5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
-
PSADIV[4:0]
PLLRDY
PLLEN
Bit 4
Bit 4
Bit 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
RC32KCAL[7:0]
COMP[23:16]
COMP[15:8]
COMP[7:0]
COMP[7:0]
CALL[7:0]
XOSCRDY
XOSCEN
Bit 3
Bit 3
Bit 3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
RTCSRC[2:0]
RC32KRDY
PLLFAC[4:0]
RC32KEN
CALH[11:8]
Bit 2
Bit 2
Bit 2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
XOSCSEL[3:0]
SCLKSEL[2:0]
R32MRDY
R32MEN
Bit 1
Bit 1
Bit 1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PSBCDIV[1:0]
RC2MRDY
RC2MEN
ENABLE
RTCEN
XMEGA A
Bit 0
Bit 0
Bit 0
LOCK
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Page
Page
Page
84
84
86
86
87
87
88
89
90
90
91
92
92
92
92
93
93
93
94