ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 258

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.3
22.3.1
22.3.2
22.3.3
8077H–AVR–12/09
Registers Description
TXPLCTRL - IRCOM Transmitter Pulse Length Control Register
RXPLCTRL - IRCOM Receiver Pulse Length Control Register
CTRL - IRCOM Control Register
• Bits 7:0 - TXPLCTRL[7:0] - Transmitter Pulse Length Control
The 8-bit value sets the pulse modulation scheme for the transmitter. Setting this register will
have no effect if IRCOM mode is not selected by a USART.
By leaving this register value to zero, 3/16 of baud rate period pulse modulation is used.
Setting this value from 1 to 254 will give a fixed pulse length coding. The 8-bit value sets the
number of system clock periods for the pulse. The start of the pulse will be synchronized with the
rising edge of the baud rate clock.
Setting the value to 255 (0xFF) will disable pulse coding, letting the RX and TX signals pass
through the IRCOM Module unaltered. This enables other features through the IRCOM Module,
such as half-duplex USART, Loop-back testing and USART RX input from an Event Channel.
Note:
• Bits 7:0 - RXPLCTRL[7:0] - Receiver Pulse Length Control
The 8-bit value sets the filter coefficient for the IRCOM transceiver. Setting this register will have
no effect if IRCOM mode is not selected by a USART.
By leaving this register value to zero, filtering is disabled. Setting this value between 1 and 255
will enable filtering, where x+1 equal samples is required for the pulse to be accepted.
Note:
• Bits 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Bit
+0x01
Read/Write
Initial Value
Bit
+0x02
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
TXPCTRL must be configured before USART transmitter is enabled (TXEN).
RXPCTRL must be configured before USART receiver is enabled (RXEN).
R/W
R/W
7
0
7
0
7
R
0
-
R/W
R/W
6
0
6
0
6
R
0
-
R/W
R/W
5
0
5
0
R
5
0
-
R/W
R/W
4
0
TXPLCTRL[7:0]
4
0
RXPLCTRL[7:0]
R
4
0
-
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
EVSEL[3:0]
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
TXPLCTRL
RXPLCTRL
CTRL
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