ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 161

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.8.4
8077H–AVR–12/09
Dual Slope PWM
Figure 14-13. Single slope Pulse Width Modulation
The PER register defines the PWM resolution. The minimum resolution is 2-bit (PER=0x0003),
and maximum resolution is 16-bit (PER=MAX).
The following equation can be used for calculate the exact resolution for single-slope PWM
(R
The single slow PWM frequency (f
eral clock frequency (f
where N represents the prescaler divider used (1, 2, 4, 8, 64, 256, 1024, or event channel n).
For dual slope PWM generation, the Period (T) is controlled by the PER, while CCx registers
control the duty cycle of the WG output.
ter counts repeatedly from BOTTOM to TOP, and then from TOP to BOTTOM. The waveform
generator output is set on BOTTOM, cleared on compare match when upcounting and set on
compare match when down counting.
R
f
PWM_SS
PWM_SS
PWM_SS
CNT
WG Output
=
):
=
------------------------------ -
N PER
log
---------------------------------- -
(
f
(
log
PER
MAX
PER
TOP
BOT
2 ( )
+
CCx
1
+
)
1
PER
)
), and can be calculated by the following equation:
Period (T)
PWM_SS
Figure 14-14
) depends on the period setting (PER) and the Periph-
CCx=BOT
shows how for dual slope PWM the Coun-
CCx=TOP
XMEGA A
"update"
"match"
161