ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 117

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
11. WDT – Watchdog Timer
11.1
11.2
11.3
8077H–AVR–12/09
Features
Overview
Normal Mode Operation
The Watchdog Timer (WDT) is a system function for monitoring correct program operation, mak-
ing it possible to recover from error situations, for instance run-away code. The WDT is a timer,
configured to a predefined timeout period and is constantly running when enabled. If the WDT is
not reset within the timeout period, it will issue a system reset. The WDT is reset by executing
the WDR (Watchdog Timer Reset) instruction from the application code.
The WDT also has a window mode that enables the user to define a time slot where WDT must
be reset within. If the WDT is reset too early or too late, a system reset will be issued.
The WDT will run in all power modes if enabled. It runs from a CPU independent clock source,
and will continue to operate to issue a system reset even if the main clocks fail.
The Configuration Change Protection mechanism ensures that the WDT settings cannot be
changed by accident. In addition the settings can be locked by a fuse.
In normal mode operation a single timeout period is set for the WDT. If the WDT is not reset from
the application code before the timeout occurs the WDT will issue a system reset. There are 11
possible WDT timeout (TO
any time during the period. After each reset, a new timeout period is started. The default timeout
period is controlled by fuses. Normal mode operation is illustrated in
Figure 11-1. Normal mode operation.
11 selectable timeout period, from 8 ms to 8s
Two operation modes
Runs from 1 kHz Ultra Low Power clock reference
Configuration lock
– Standard mode
– Window mode
TO
WDT
= 16
WDT Count
WDT
5
) periods selectable from 8 ms to 8s, and the WDT can be reset at
10
15
System Reset
20
Timely WDT
Reset
TO
25
WDT
30
Figure
35
WDT Timeout
11-1.
XMEGA A
t [ms]
117

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