ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 273

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
24.7.2
24.8
8077H–AVR–12/09
SDRAM Configuration
Multiplexing Data with Address Byte 0 and 1
When the data byte and address byte 0 (AD[7:0]), and address byte 1 (A[15:8]) are multiplexed,
they are output from the same port, and the ALE1 and ALE2 signal from the device control the
external address latches.
Figure 24-7. Multiplexed SRAM LPC connection using ALE1 and ALE2
Chip Select 3 on the EBI can be configured from SDRAM operation, and the EBI must be config-
ured for 3-Port or 4-Port interface. The SDRAM can be configured for 4-bit or 8-bit data bus, and
4-Port interface must be used for 8-bit data bus. The SDRAM interface signals from the EBI to
the SDRAM is listed in
Table 24-2.
Signal
CS
WE
RAS
CAS
DQM
CKE
CLK
BA[1:0]
A[12:0]
A[10]
D[7:0]
SDRAM Interface signals
EBI
Description
Chip Select
Write Enable
Row Address Strobe
Column Address Strobe
Data Mask Signal/ Output Enable
Clock Enable
Clock
Bank Address
Address bus
Precharge
Data bus
Table 24-2 on page
A[19:16]
A[15:8]/
AD[7:0]
ALE1
ALE2
D
G
273.
Q
D
G
Q
D[7:0]
A[7:0]
A[15:8]
A[19:16]
SRAM
XMEGA A
273

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