ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 152

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8077H–AVR–12/09
Figure 14-2. Timer/Counter Block Diagram
The Counter Register (CNT), the Period Registers w/buffer (PER and PERBUF), and the com-
pare and Capture registers w/buffers (CCx and CCxBUF) are 16-bit registers.
During normal operation the counter value is continuously compared to zero and the period
(PER) value to determine whether the counter has reached TOP or BOTTOM.
The counter value is also compared to the CCx registers. These comparators can be used to
generate interrupt requests or request DMA transactions. They also generate events for the
Event System. The waveform generator modes use the comparators to set the waveform period
or pulse width.
A prescaled peripheral clock and events from the Event System can be used for controlling the
counter. The Event System is also used as source to the input capture. Combined with the
Quadrature Decoding functionality in the Event System QDEC, the Timer/Counter can be used
for high speed Quadrature Decoding.
Bus Bridge
Base Counter
Compare/Capture
(x = {A,B,C,D})
Counter
V
V
TEMP
PERBUF
CCxBUF
PER
CNT
CCx
A
=
I/O Data Bus (8-bit)
B
= 0
C
CTRL
D
=
Clock Select
Event Select
E
CKSEL
EVSEL
"count"
"clear"
"load"
"direction"
"capture"
"match"
TOP
BOTTOM
G
Control Logic
Control Logic
INTCTRL
Generation
Waveform
A
B
INTFLAGS
XMEGA A
OVF/UNF
(INT/DMA Req.)
ERRIF
(INT Req.)
OCx Out
CCxIF
(INT/DMA
Req.)
152